uberClock: A High-Quality Clock Construction Project

The uberClock project explores advanced techniques in clock signal generation using multi-mode quartz oscillators, aiming to achieve stability levels comparable to Stratum 2 Rubidium clocks, all while maintaining a reduced total cost of ownership. This initiative gathers empirical data, develops experimental prototypes, and employs digital signal processing (DSP) methods to counteract the effects of temperature variations, dynamic acceleration, and static gravity.

Key Features

• Versatile Clock Sources:

  • Generates clock signals from various sources including GPS signals, MEMS oscillators, SAW resonators, and quartz crystals. Each source varies in terms of absolute accuracy, frequency stability, phase noise, and cost.

• Innovative Research:

  • Investigates the properties of multi-mode crystal oscillators, leveraging extensive mathematical calculations processed through FPGA technologies with open-source tools like CflexHDL and PipelineC.

• Proof-of-Concept Development:

  • This project serves as a foundational framework for future research, potentially leading to applications in Artificial Intelligence. Alongside a functional prototype—including PCBs, FPGA gateware, and embedded firmware—scientific papers will document proceedings and findings.

Project Objectives

1. Hardware Acquisition:

   • Design, manufacture, and debug the custom analog board necessary for the project, while acquiring required FPGA, ADC, and DAC components.

2. Digital Infrastructure Development:

   • Establish a CPU hardware subsystem based on an open-source RISC-V core and develop a bare-metal software foundation to facilitate future DSP applications.

3. DSP Model and Documentation:

   • Model the quartz crystal and DSP datapath while creating a comprehensive document that details the underlying theory, concepts, and methodologies employed in the system.

4. Integration and Characterization:

   • Connect the digital and analog components, characterize individual crystals, and develop characterization procedures.

5. Implementation of DSP Algorithms:

   • Integrate DSP algorithms into both hardware and software components, creating a cohesive system.

6. Benchmarking and Optimization:

   • Test the DSP aspects in conjunction with the crystal, optimizing algorithms based on empirical data.

7. Toolchain Porting:

   • Transition the toolchain from Vivado to openXC to enhance software compatibility and flexibility.

Illustrations of Hardware Components

• The hardware setup utilizes custom-designed analog boards and FPGA modules to achieve the desired performance and stability.

References and Resources

• Extensive literature and tools are referenced within the project to assist in understanding the principles of quartz crystal oscillators and DSP implementations.

For more detailed information and project updates, please refer to the associated links and external documentation provided in the README.